{"id":1901,"date":"2024-12-27T10:54:05","date_gmt":"2024-12-27T10:54:05","guid":{"rendered":"https:\/\/baidpower.com\/store\/?post_type=product&p=1901"},"modified":"2024-12-27T11:01:50","modified_gmt":"2024-12-27T11:01:50","slug":"cd4043be","status":"publish","type":"product","link":"https:\/\/baidpower.com\/store\/product\/cd4043be\/","title":{"rendered":"CD4043BE"},"content":{"rendered":"\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
Category<\/strong><\/td>\nIntegrated Circuits (ICs)<\/strong><\/a><\/p>\n

Logic<\/strong><\/a><\/p>\n

Latches<\/strong><\/a><\/td>\n<\/tr>\n

Manufacturer:<\/strong><\/td>\nTexas Instruments<\/strong><\/a><\/td>\n<\/tr>\n
Series<\/strong><\/td>\n4000B<\/strong><\/a><\/td>\n<\/tr>\n
No. of Bits<\/strong><\/td>\n4bit<\/td>\n<\/tr>\n
Part Status<\/strong><\/td>\nActive<\/td>\n<\/tr>\n
Logic Type<\/strong><\/td>\nS-R Latch<\/td>\n<\/tr>\n
Circuit<\/strong><\/td>\n1:1<\/td>\n<\/tr>\n
Output Type<\/strong><\/td>\nTri-State<\/td>\n<\/tr>\n
Voltage – Supply<\/strong><\/td>\n3V ~ 18V<\/td>\n<\/tr>\n
Independent Circuits<\/strong><\/td>\n4<\/td>\n<\/tr>\n
Delay Time – Propagation<\/strong><\/td>\n50ns<\/td>\n<\/tr>\n
Current – Output High, Low<\/strong><\/td>\n6.8mA, 6.8mA<\/td>\n<\/tr>\n
Operating Temperature<\/strong><\/td>\n-55\u00b0C ~ 125\u00b0C<\/td>\n<\/tr>\n
Mounting Type<\/strong><\/td>\nThrough Hole<\/td>\n<\/tr>\n
Package \/ Case<\/strong><\/td>\n16-DIP (0.300″, 7.62mm)<\/td>\n<\/tr>\n
Base Product Number<\/strong><\/td>\nCD4043<\/strong><\/a><\/td>\n<\/tr>\n
<\/td>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

The CD4043BE is a CMOS quad NOR R\/S Latch with 3-state outputs. Each latch has a separate Q output and individual SET and RESET inputs. The Q outputs are controlled by a common ENABLE input. A logic “1” or high on the ENABLE input connects the latch states to the Q outputs. A logic “0” or low on the ENABLE input disconnects the latch states from the Q outputs, resulting in an open circuit condition on the Q outputs. The open circuit feature allows common busing of the outputs.<\/p>\n